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3D IC

3D IC

By: Siemens Digital Industries Software
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 As the semiconductor industry struggles with the limits of Moore’s Law, traditional monolithic scaling is no longer enough to meet performance, power, area and cost demands in technology, design, analysis, and manufacturing. 3D IC by Siemens is your go-to podcast for exploring the cutting-edge world of 3D IC packaging—a revolutionary approach reshaping semiconductor design, system integration, and heterogeneous computing. Join industry leaders, engineers, and innovators as we break down advanced IC packaging solutions like 2.5D/3D IC, FCBGA, FOWLP, and more. Discover how chiplets, multi-die integration, and high-bandwidth memory (HBM) are driving higher performance, lower power consumption, and scalable architectures. In each episode, we dive deep into the challenges and opportunities of IC design and manufacturing, including: Roadmap for advanced packaging and heterogeneous integration in semiconductor scaling Mainstream adoption of 3D IC—key challenges and breakthroughs Optimizing micro-architecture and integration platforms for performance and efficiency Strategic planning of chiplets and interposers for hierarchical device integration Leveraging early predictive multi-physics analysis to enhance design accuracy Automating design and routing for RDL-based fan-out wafer-level packaging (FOWLP) Exploring glass substrates for superior electrical and thermal performance Developing test-vehicles and daisy chain designs for architectural validation Ensuring reliability and manufacturability in 3D IC heterogeneous integration Mastering Signal Integrity (SI) and Power Integrity (PI) Analysis for high-speed systems Managing thermal challenges in stacked die architectures Subscribe now and stay ahead in the world of 3D IC. Learn more: Siemens 3D IC Packaging SolutionsSiemens Digital Industries Software Politics & Government
Episodes
  • Why Every 3D IC Needs a Test Vehicle Before It Hits Production

    Why Every 3D IC Needs a Test Vehicle Before It Hits Production
    Sep 4 2025
    How do you ensure that cutting-edge 3D IC designs can actually be manufactured before investing millions in production? What you’ll learn… What test vehicles are and why they’re indispensable for validating manufacturability How daisy chain structures pinpoint weaknesses in bumps, balls, and die connections Who builds test vehicles: OSATs, foundries, or customers, and why it matters How test vehicles strengthen collaboration between OEMs and OSATs The hidden value of test vehicles in reliability, regulatory compliance, and risk mitigation Where you’ll find it…. (02:00) What a test vehicle is when it’s needed (03:20) Real-world example: testing embedded chips before mass production (06:00) Who’s responsible for creating test vehicles? (07:20) How do test vehicles factor into the relationship between the OSATs and the OEMs? (09:25) The link between test vehicles and PCB design practices (11:12) Beyond connectivity: heaters, capacitive structures, and stacked vias (15:25) Automotive and regulatory requirements for reliability testing (17:15) Why engineers shouldn’t design daisy chains by hand More about this episode… In this episode of the Siemens 3D IC Podcast, host John McMillan talks with Kendall Hiles, Senior 3D IC Product Specialist at Siemens EDA, about the critical role of test vehicles and daisy chain design tests in semiconductor innovation. Unlike a final product, a test vehicle isn’t built to sell, it’s built to learn. Kendall Hiles explains how test vehicles act as manufacturing “test beds,” enabling engineers to validate new processes and technologies before scaling up to costly production runs. The conversation dives into daisy chain design tests, a clever way of stringing together bumps and balls to measure connectivity and identify failure points with precision. Kendall also highlights when OSATs, foundries, or customers should take ownership of creating test vehicles, and how they factor into collaboration between OEMs and manufacturers. Listeners will also hear why test vehicles are especially vital for automotive reliability and regulatory compliance, and why manual spreadsheet-driven daisy chain design is a risky practice in today’s complex 3D IC world. For anyone working in semiconductor packaging, 3D IC design, or advanced manufacturing, this episode offers practical insight into improving yield, reducing risk, and accelerating innovation. Connect with John McMillan LinkedIn Website Connect with Kendall Hiles LinkedIn Website
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    18 mins
  • Breaking Down 50 Million Pins: A Smarter Way to Design 3D IC Packages

    Breaking Down 50 Million Pins: A Smarter Way to Design 3D IC Packages
    Aug 21 2025
    How do you design and verify a package with tens of millions of pins — without losing months to manual rework? What you’ll learn… Why chiplet-based architectures demand new approaches to IC packaging How hierarchical device planning reduces overwhelming complexity The risks of spreadsheet-based workflows and why they’re no longer viable How early, multi-domain analysis helps avoid costly late-stage redesigns What Siemens’ Innovator 3D IC Portfolio offers for synchronized, error-proof design Where you’ll find it…. (01:50) Current changes in IC Packaging and the impact on the whole ecosystem (03:00) How to manage complexity scaling (03:35) What hierarchical device planning is and why it matters (05:00) How traditional methods fall short for high-pin-count designs (06:20) The risks and consequences of package assembly errors (07:00) What next-gen tools must deliver for designers (09:10) Siemens’ Innovator 3D IC Portfolio overview More about this episode… In this episode of the Siemens 3D IC Podcast, host John McMillan speaks with Per Viklund, Director of IC Packaging and RF Product Lines at Siemens EDA, about the growing challenge of managing chiplet and interposer complexity in advanced 3D IC designs. Per explains how hierarchical device planning enables designers to work at the right level of abstraction, streamlining the creation, optimization, and verification of massive, high-pin-count packages. The discussion covers why spreadsheet-based methods no longer cut it, the risks of unsynchronized workflows, and how early, multi-domain analysis can prevent costly late-stage redesigns. The episode also introduces Siemens’ Innovator 3D IC Portfolio — a unified, AI-infused solution designed to support the entire packaging workflow, from early planning through final layout, with built-in data management to eliminate version errors. Ideal for IC packaging engineers, 3D IC architects, chiplet designers, substrate fabricators, and verification professionals working on high-complexity designs. Connect with John McMillan LinkedIn Website Connect with Per Viklund LinkedIn Website
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    10 mins
  • Why SI/PI is Mission-Critical for 3D IC Success

    Why SI/PI is Mission-Critical for 3D IC Success
    Aug 7 2025
    How do you ensure clean, stable power and reliable signal transmission in a dense 3D IC stack without introducing late-stage surprises? What you’ll learn… What SI/PI means and why it’s essential for 3D IC reliability How 3D design shifts traditional SI/PI workflows and stakeholder roles What progressive verification looks like in practice—from architectural feasibility to detailed modeling How new standards like UCIe and AIB add flexibility—and ambiguity—to the design process The real-world challenges Siemens overcame with Chiplets, a smart substrate startup Where you’ll find it…. What is SI/PI and why does it matter in 3D IC? (1:40) How does the SI/PI flow differ from traditional monolithic designs? (3:20) What is progressive verification, and how does it help? (5:55) Who are the key stakeholders—and why is collaboration essential? (9:20) The story behind Siemens’ partnership with Chiplets (11:35) Final thoughts on the future of 3D IC and SI/PI’s role (14:05) In this episode of the Siemens 3D IC Podcast, host John McMillan sits down with John Caka, Principal SI/PI Engineer at Siemens EDA, to explore why signal and power integrity (SI/PI) analysis is more vital than ever in 3D IC workflows—and why progressive verification is key to managing complexity at every stage of design. Together, they unpack the evolving demands of SI/PI in 3D IC architecture, from early planning to vendor-specific IP verification. You'll learn how multidisciplinary teams—spanning layout, thermal, mechanical, electrical, and packaging—must align in parallel to make next-gen designs successful. This episode also shares behind-the-scenes insight into Siemens’ recent collaboration with Chiplets, highlighting the EDA tool flexibility and scalability needed for today’s massive pin-count designs. Ideal for SI/PI engineers, 3D IC architects, packaging teams, die designers, layout specialists, and system-level verification professionals. Connect with John McMillan LinkedIn Website Connect with John Caka LinkedIn Website
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    16 mins
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